1. Field of the Invention
This invention relates to a semiconductor device where MIS transistors each including a gate electrode with a stacked structure of a silicon film and a metal film and high-resistance elements are integrated and to a method of manufacturing the semiconductor device.
2. Description of the Related Art
Polysilicon (Poly-Si) has been widely used as a material for high-resistance elements in logic devices. A resistance element composed of a polysilicon film can be formed by the polysilicon film in the same layer as the gate electrode of a MIS transistor. Controlling the impurity concentration of a polysilicon film enables its resistance to be set freely and a high resistance not lower than 800Ω/□ to be realized easily.
In recent years, however, to increase the operation speed by reducing the gate delay, metal material has been used for the gate electrode of a MIS transistor (e.g., refer to Jpn. Pat. Appln. KOKAI Publication No. 2005-150178). Since the resistance of such a metal gate electrode is low, it is difficult to form a high-resistance element using the same layer as that of the gate electrode. Even when the gate electrode has a stacked structure of metal and polysilicon (MIPS: Metal Inserted Poly-Si Stack) where the metal layer is composed of a thin film (not more than 10 nm), a resistance element with a sufficiently high resistance cannot be realized using the same layer as that of the gate electrode.
Accordingly, a MIS transistor and a high-resistance element have to be formed in separate processes. Alternatively, after an MIPS-structure resistance element is formed, the metal layer of the resistance element has to be removed to increase the resistance of the element. The process of removing the metal layer is very complicated and an increase in the number of manufacturing processes might lead to a decrease in the yield.